Heterogeneous Core Microarchitecture with Functional Unit Gating for High Energy Efficiency


Energy efficiency has become an important issue in modern microprocessor designs. In this paper, we propose a core microarchitecture that exploits high energy efficiency by pushing in-order execution capability into traditional out-of-order execution models and selectively activating in-order execution resources through power-gating. The proposed architecture is motivated by the fact that existing Front-end Execution Architecture (FXA) is not always energy-efficient because in-order execution resources are turned on every time, even though it is not necessary. Compared to the FXA, our design shows lower energy consumption on in-order execution resources by 80%, while performance degradation is less than 1%.

Annual Summer Conference of IEIE
Ipoom Jeong
Ipoom Jeong
Assistant Professor

My research interests include CPU/GPU microarchitectures, memory/storage system designs, and smart-I/O devices