Ipoom Jeong

Ipoom Jeong

Assistant Professor

Yonsei University

Biography

Ipoom Jeong is an Assistant Professor in the Department of System Semiconductor Engineering at Yonsei University and a member of the Institute of Electrical and Electronics Engineers (IEEE). He earned his Ph.D. degree from the Department of Electrical and Electronic Engineering at Yonsei University in 2020. His research expertise encompasses roles such as a Hardware Engineer in the Memory Business division at Samsung Electronics (2020-2021), a Research Professor in the School of Electrical and Electronic Engineering at Yonsei University (2021-2022), and a Postdoctoral Research Associate at the University of Illinois Urbana-Champaign (2022-2024).

Interests
  • Energy-Efficient CPU/GPU Microarchitectures
  • High-Performance System Architectures
  • Near-Data Processing (e.g., PIM, SmartSSD, and SmartNIC)
  • Interconnect Technologies (e.g., CXL)
Education
  • PhD in Electrial and Electronic Engineering, 2020

    Yonsei University

  • BS in Electrial and Electronic Engineering, 2014

    Yonsei University

Experience

 
 
 
 
 
Assistant Professor
March 2024 – Present Seoul, Korea
  • Department of System Semiconductor Engineering
  • School of Electrical and Electronic Engineering
  • Research Topics: Energy-Efficient CPU/GPU Microarchitectures, High-Performance System Architectures, Near-Data Processing, Interconnect Technologies
 
 
 
 
 
Postdoctoral Research Associate
September 2022 – February 2024 Illinois, USA
  • Coordinated Science Lab (CSL)
  • Principal Investigator (PI): Professor Nam Sung Kim
  • Research Topics: Architectural Optimizations for Datacenters, CXL-Based Device Architectures, Smart-I/O Devices (SmartSSD, SmartNIC, etc.)
 
 
 
 
 
Research Professor
September 2021 – August 2022 Seoul, Korea
  • BK21 Y-BASE R&E Institute, Department of Electrical and Electronic Engineering
  • Research Topics: Energy-Efficient CPU/GPU Microarchitectures, Processing-in-Memory (PIM) Architectures
 
 
 
 
 
Engineer/Staff Engineer
March 2020 – August 2021 Hwaseong-si, Gyeonggi-do, Korea
  • Advanced Solution Development Team, Memory Business
  • Research Topics: CXL-Based Accelerator/Memory Expansion Device Architectures, Computational Storage Drive (SmartSSD 2.0) SoC Architecture
 
 
 
 
 
Graduate Research Assistant
March 2014 – February 2020 Seoul, Korea
  • Embedded Systems and Computer Architecture Lab (eSCaL)
  • Advisor: Professor Won Woo Ro
  • Research Topics: Energy-Efficient CPU/GPU Microarchitectures, Multi-Core Architectures
 
 
 
 
 
Teaching Assistant
March 2014 – February 2020 Seoul, Korea
  • Undergraduate courses: Computer Architecture (EEE3530, 14-1st, 16-1st), Electrical and Electronic Engineering Experiments: Fundamentals (EEE2111, 14-2nd, 15-2nd), Graduation Research (15-1st)
  • Graduate courses: Advanced Computer Architecture (E6501, 17-1st), System Design and Applications Lab (EEE6611, 18-1st, 18-2nd)
 
 
 
 
 
Undergraduate Research Assistant
August 2013 – February 2014 Seoul, Korea
  • Embedded Systems and Computer Architecture Lab (eSCaL)
  • Advisor: Professor Won Woo Ro
  • Research Topics: Exploiting Back-end Fusion in Multi-Core Processors

Recent & Upcoming Events

[ISCA 2023 Tutorial] On-chip Accelerators in 4th Gen Intel® Xeon® Scalable Processors: Features, Performance, Use Cases, and Future!
International Symposium on Computer Architecture (ISCA) 2023 Tutorial
[ISCA 2023 Tutorial] On-chip Accelerators in 4th Gen Intel® Xeon® Scalable Processors: Features, Performance, Use Cases, and Future!

Recent Publications

Quickly discover relevant content by filtering publications.
(2024). Demystifying a CXL Type-2 device: A heterogeneous cooperative computing perspective. IEEE/ACM International Symposium on Microarchitecture (MICRO, accepted).

(2024). Triple-A: Early Operand Collector Allocation for Maximizing GPU Register Bank Utilization. IEEE Embedded Systems Letters (Volume: 16, Issue: 2).

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(2024). Intel Accelerator Ecosystem: An SoC-Oriented Perspective. IEEE/ACM International Symposium on Computer Architecture (ISCA).

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(2024). HAL: Hardware-assisted Load Balancing for Energy-efficient SNIC-Host Cooperative Computing. IEEE/ACM International Symposium on Computer Architecture (ISCA).

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(2024). TAROT: A CXL SmartNIC-Based Defense Against Multi-bit Errors by Row Hammer Attacks. ACM Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS).

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Projects

SmartSSD 2.0: Developing Next-Generation Computational Storage Drive
SmartSSD 2.0: Developing Next-Generation Computational Storage Drive
Developing CXL-Based Accelerator and Memory Expansion Device
  • Research and development project at Samsung Electronics (2020.03 - 2020.08)
  • Developing CXL (Compute eXpress Link) Type 2 accelerator and Type 3 memory expansion device by leveraging NAND flash
Developing CXL-Based Accelerator and Memory Expansion Device
Developing CPU-GPU Heterogeneous Computing Simulation Framework
  • Research project at Yonsei University joint with SK Hynix (2019.02 - 2020.02)
  • Developing a simulation framework for CPU-GPU heterogeneous computing that supports processing of the state-of-the-art deep learning algorithms
Developing CPU-GPU Heterogeneous Computing Simulation Framework
Developing Energy-Efficient Approximate Memory for Neural Network Applications
  • Research project at Yonsei University joint with SK Hynix (2018.07 - 2019.06)
  • Exploring an energy-efficient approximate memory architecture for deep learning applications
Developing Energy-Efficient Approximate Memory for Neural Network Applications
Developing Processor and Memory System for Next-Generation Security Platform
  • Research project at Yonsei University joint with Samsung Electronics (2017.09 - 2018.08)
  • Developing ASIPs (Application-Specific Instruction-Set Processors) for cryptographic algorithms (e.g., AES, SHA-256, and RSA-2048)
Developing Processor and Memory System for Next-Generation Security Platform
Constructing a Verification Environment for Data Plane Acceleration and Performance Analysis
  • Research project at Yonsei University joint with ETRI (2015.07 - 2015.12)
  • Developing and verifying optimization techniques for improving data plane acceleration in virtualized network environment
Constructing a Verification Environment for Data Plane Acceleration and Performance Analysis
Developing Low-Power Mobile Computing Platform
  • Research project at Yonsei University joint with LG Electronics (2014.07 - 2017.11)
  • Inter- and Intra-core optimization techniques for higher energy efficiency of mobile APs (Application Processors)
Developing Low-Power Mobile Computing Platform

Scholarships and Awards

[2021.11] Encouragement Prize at the Outstanding Patent Award (SK Hynix)

  • Memory Device Including a Plurality of Area Having Different Refresh Periods, Memory Controller Controlling the Same and Memory System Including the Same
  • US patent, Registered in 2022.03.15 (Application no: 16/988478, Registration no: 11276452)

[2020.02] Bronze Prize at the 26th Samsung Humantech Paper Award (Samsung Electronics)

  • Ipoom Jeong, Seihoon Park
  • CASINO Core Microarchitecture: Generating Out-of-Order Schedules Using Cascaded In-Order Scheduling Windows

[2019.11] Excellent Graduate Researcher Scholarship (Yonsei University)

[2018.02] Encouragement Prize at the 24th Samsung Humantech Paper Award (Samsung Electronics)

  • Ipoom Jeong, Changmin Lee
  • Cg-CMT: Expanding Instruction Window via Coarse-Grained Instruction Commit

[2010.03 - 2014.02] National Scholarship for Science and Engineering (KOSAF)

Activities

Tutorial Organizer

  • On-chip Accelerators in 4th Gen Intel® Xeon® Scalable Processors: Features, Performance, Use Cases, and Future!
  • 50th International Symposium on Computer Architecture (ISCA 2023)

Conference Session Chair

  • Artificial Intelligence Circuits and Systems (AICAS 2022)

External Reviewer

  • IEEE Transactions on Emerging Topics in Computing (TETC)
  • IEEE Transactions on Computers (TC)
  • IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS)
  • IEEE Computer Architecture Letters (CAL)
  • ACM Transactions on Architecture and Code Optimization (TACO)
  • Microprocessors and Microsystems

Contact